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4H-SiC Trench pMOSFETs for High-Frequency CMOS Inverters
https://repo.qst.go.jp/records/76555
https://repo.qst.go.jp/records/765559d00bab2-093f-4e82-8bc5-0f78afbbd317
| Item type | 会議発表論文 / Conference Paper(1) | |||||
|---|---|---|---|---|---|---|
| 公開日 | 2019-08-23 | |||||
| タイトル | ||||||
| タイトル | 4H-SiC Trench pMOSFETs for High-Frequency CMOS Inverters | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
| 資源タイプ | conference paper | |||||
| アクセス権 | ||||||
| アクセス権 | metadata only access | |||||
| アクセス権URI | http://purl.org/coar/access_right/c_14cb | |||||
| 著者 |
Inoue, J.
× Inoue, J.× S.-I., Kuroki× Ishikawa, S.× Maeda, T.× Sezaki, H.× Makino, Takahiro× Ohshima, Takeshi× M., Östling× C.-M., Zetterling× Makino, Takahiro× Ohshima, Takeshi |
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| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | Low-parasitic-capacitance 4H-SiC pMOSFETs were demonstrated for high-frequency CMOS inverters. In these pMOSFETs, device characteristics including parasitic capacitances were investigated and low parasitic capacitance was achieved by the trench gate structure. | |||||
| 書誌情報 |
Materials Science Forum 巻 963, p. 837-840, 発行日 2019-07 |
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| ISSN | ||||||
| 収録物識別子タイプ | ISSN | |||||
| 収録物識別子 | 1662-9752 | |||||
| DOI | ||||||
| 識別子タイプ | DOI | |||||
| 関連識別子 | 10.4028/www.scientific.net/MSF.963.837 | |||||
| 関連サイト | ||||||
| 識別子タイプ | URI | |||||
| 関連識別子 | https://www.scientific.net/MSF.963.837 | |||||
