{"created":"2023-05-15T14:38:04.588048+00:00","id":49123,"links":{},"metadata":{"_buckets":{"deposit":"ab1e9108-0531-4b7a-b3da-8d69a84ec942"},"_deposit":{"created_by":1,"id":"49123","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"49123"},"status":"published"},"_oai":{"id":"oai:repo.qst.go.jp:00049123","sets":["1"]},"author_link":["495593","495584","495588","495592","495590","495589","495587","495585","495591","495583","495586"],"item_8_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2018-06","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"974","bibliographicPageStart":"971","bibliographicVolumeNumber":"924","bibliographic_titles":[{"bibliographic_title":"Materials Science Forum"}]}]},"item_8_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Low-parasitic-capacitance 4H-SiC nMOSFETs using a novel self-aligned process were demonstrated. In these nMOSFETs, device characteristics including parasitic capacitance (gate-source, gate-drain, drain-source capacitance) were investigated. As a result, low parasitic capacitance was achieved by the self-aligned structure.","subitem_description_type":"Abstract"}]},"item_8_publisher_8":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Trans Tech Publications"}]},"item_8_relation_14":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"10.4028/www.scientific.net/MSF.924.971","subitem_relation_type_select":"DOI"}}]},"item_access_right":{"attribute_name":"アクセス権","attribute_value_mlt":[{"subitem_access_right":"metadata only access","subitem_access_right_uri":"http://purl.org/coar/access_right/c_14cb"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kurose, T."}],"nameIdentifiers":[{"nameIdentifier":"495583","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Kuroki, S.-I."}],"nameIdentifiers":[{"nameIdentifier":"495584","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Ishikawa, S."}],"nameIdentifiers":[{"nameIdentifier":"495585","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Maeda, T."}],"nameIdentifiers":[{"nameIdentifier":"495586","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Sezaki, H."}],"nameIdentifiers":[{"nameIdentifier":"495587","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Makino, Takahiro"}],"nameIdentifiers":[{"nameIdentifier":"495588","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Ohshima, Takeshi"}],"nameIdentifiers":[{"nameIdentifier":"495589","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Östling, M."}],"nameIdentifiers":[{"nameIdentifier":"495590","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Zetterling, C.-M."}],"nameIdentifiers":[{"nameIdentifier":"495591","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"牧野 高紘","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"495592","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"大島 武","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"495593","nameIdentifierScheme":"WEKO"}]}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Low-Parasitic-Capacitance Self-Aligned 4H-SiC nMOSFETs for Harsh Environment Electronics","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Low-Parasitic-Capacitance Self-Aligned 4H-SiC nMOSFETs for Harsh Environment Electronics"}]},"item_type_id":"8","owner":"1","path":["1"],"pubdate":{"attribute_name":"公開日","attribute_value":"2018-08-02"},"publish_date":"2018-08-02","publish_status":"0","recid":"49123","relation_version_is_last":true,"title":["Low-Parasitic-Capacitance Self-Aligned 4H-SiC nMOSFETs for Harsh Environment Electronics"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2023-05-15T23:21:05.118291+00:00"}