WEKO3
アイテム
{"_buckets": {"deposit": "80a0baca-5b69-41ef-b531-beda87ede68b"}, "_deposit": {"created_by": 1, "id": "48704", "owners": [1], "pid": {"revision_id": 0, "type": "depid", "value": "48704"}, "status": "published"}, "_oai": {"id": "oai:repo.qst.go.jp:00048704", "sets": ["1"]}, "author_link": ["490050", "490046", "490051", "490054", "490044", "490045", "490055", "490056", "490049", "490048", "490052", "490047", "490053"], "item_8_biblio_info_7": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2017-02", "bibliographicIssueDateType": "Issued"}, "bibliographicPageEnd": "672", "bibliographicPageStart": "669", "bibliographicVolumeNumber": "897", "bibliographic_titles": [{"bibliographic_title": "Materials Science Forum"}]}]}, "item_8_description_5": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. For logic gate with higher voltage swing, 4H-SiC pseudo-CMOS logic inverter with four nMOS was suggested and demonstrated, and a high voltage swing of 4.4 V was achieved at VDD=5 V. Simple nMOS inverters were also investigated. Both of pseudo-CMOS and nMOS inverters were operated at a high temperature of 200°C. For future SiC large integrated circuits, junction leakage current between n+ regions were also investigated with the comb-shaped test elements.", "subitem_description_type": "Abstract"}]}, "item_8_relation_14": {"attribute_name": "DOI", "attribute_value_mlt": [{"subitem_relation_type_id": {"subitem_relation_type_id_text": "10.4028/www.scientific.net/MSF.897.669", "subitem_relation_type_select": "DOI"}}]}, "item_8_source_id_9": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "0255-5476", "subitem_source_identifier_type": "ISSN"}]}, "item_access_right": {"attribute_name": "アクセス権", "attribute_value_mlt": [{"subitem_access_right": "metadata only access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_14cb"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "Kuroki, Shin-ichiro"}], "nameIdentifiers": [{"nameIdentifier": "490044", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Kurose, T."}], "nameIdentifiers": [{"nameIdentifier": "490045", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Nagatsuma, H."}], "nameIdentifiers": [{"nameIdentifier": "490046", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Ishikawa, S."}], "nameIdentifiers": [{"nameIdentifier": "490047", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Maeda, T."}], "nameIdentifiers": [{"nameIdentifier": "490048", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Sezaki, H."}], "nameIdentifiers": [{"nameIdentifier": "490049", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Kikkawa, T."}], "nameIdentifiers": [{"nameIdentifier": "490050", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Makino, T."}], "nameIdentifiers": [{"nameIdentifier": "490051", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Ohshima, T."}], "nameIdentifiers": [{"nameIdentifier": "490052", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Ostling, M."}], "nameIdentifiers": [{"nameIdentifier": "490053", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Zetterling, C.-M."}], "nameIdentifiers": [{"nameIdentifier": "490054", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "牧野 高紘", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "490055", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "大島 武", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "490056", "nameIdentifierScheme": "WEKO"}]}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics"}]}, "item_type_id": "8", "owner": "1", "path": ["1"], "permalink_uri": "https://repo.qst.go.jp/records/48704", "pubdate": {"attribute_name": "公開日", "attribute_value": "2018-04-12"}, "publish_date": "2018-04-12", "publish_status": "0", "recid": "48704", "relation": {}, "relation_version_is_last": true, "title": ["4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics"], "weko_shared_id": -1}
4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics
https://repo.qst.go.jp/records/48704
https://repo.qst.go.jp/records/48704c1353289-c670-4171-a424-a52fbaded103
Item type | 学術雑誌論文 / Journal Article(1) | |||||
---|---|---|---|---|---|---|
公開日 | 2018-04-12 | |||||
タイトル | ||||||
タイトル | 4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
アクセス権 | ||||||
アクセス権 | metadata only access | |||||
アクセス権URI | http://purl.org/coar/access_right/c_14cb | |||||
著者 |
Kuroki, Shin-ichiro
× Kuroki, Shin-ichiro× Kurose, T.× Nagatsuma, H.× Ishikawa, S.× Maeda, T.× Sezaki, H.× Kikkawa, T.× Makino, T.× Ohshima, T.× Ostling, M.× Zetterling, C.-M.× 牧野 高紘× 大島 武 |
|||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. For logic gate with higher voltage swing, 4H-SiC pseudo-CMOS logic inverter with four nMOS was suggested and demonstrated, and a high voltage swing of 4.4 V was achieved at VDD=5 V. Simple nMOS inverters were also investigated. Both of pseudo-CMOS and nMOS inverters were operated at a high temperature of 200°C. For future SiC large integrated circuits, junction leakage current between n+ regions were also investigated with the comb-shaped test elements. | |||||
書誌情報 |
Materials Science Forum 巻 897, p. 669-672, 発行日 2017-02 |
|||||
ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 0255-5476 | |||||
DOI | ||||||
識別子タイプ | DOI | |||||
関連識別子 | 10.4028/www.scientific.net/MSF.897.669 |